US 11,868,621 B2
Data storage with multi-level read destructive memory
Jon D. Trantham, Chanhassen, MN (US); Praveen Viraraghavan, Chicago, IL (US); John W. Dykes, Eden Prairie, MN (US); Ian J. Gilbert, Chanhassen, MN (US); Sangita Shreedharan Kalarickal, Eden Prairie, MN (US); Matthew J. Totin, Excelsior, MN (US); Mohamad El-Batal, Superior, CO (US); and Darshana H. Mehta, Shakopee, MN (US)
Assigned to SEAGATE TECHNOLOGY LLC, Fremont, CA (US)
Filed by Seagate Technology LLC, Fremont, CA (US)
Filed on Jun. 20, 2022, as Appl. No. 17/844,174.
Claims priority of provisional application 63/213,240, filed on Jun. 22, 2021.
Prior Publication US 2022/0404982 A1, Dec. 22, 2022
Int. Cl. G06F 3/06 (2006.01); G11C 29/08 (2006.01)
CPC G06F 3/0616 (2013.01) [G06F 3/0653 (2013.01); G06F 3/0679 (2013.01); G11C 29/08 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
programming a non-volatile memory unit with a first logical state in response to a first write voltage of a first hysteresis loop, as directed by a write controller;
programming the non-volatile memory unit with a second logical state in response to a second write voltage of the first hysteresis loop, the first and second logical states present concurrently in the non-volatile memory unit;
reading the first and second logical states from the non-volatile memory unit concurrently; and
testing, with a monitor circuit, the non-volatile memory unit during satisfaction of a host generated data access request to the non-volatile memory unit with an alternate read voltage selected by the monitor circuit.