CPC G06F 3/0613 (2013.01) [G06F 3/0659 (2013.01); G06F 3/0673 (2013.01); G11C 11/40622 (2013.01); G06F 13/1636 (2013.01)] | 20 Claims |
1. A memory controller, comprising:
a command interface to transmit at least a first refresh command and a first next subsequent command to a memory component; and,
refresh control circuitry to, based at least on a first refresh masking configuration of the memory component and a first row refresh scheme of the memory component, select a first Row Refresh Cycle Timing (tRFC) to determine a first time interval between a transmission of the first refresh command and the first next subsequent command.
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