	US 11,868,616 B2
	System and method for low-distortion compaction of floating-point numbers
Joshua Cooper, Columbia, SC (US); Aliasghar Riahi, Orinda, CA (US); Mojgan Haddad, Orinda, CA (US); Ryan Kourosh Riahi, Orinda, CA (US); Razmin Riahi, Orinda, CA (US); and Charles Yeomans, Orinda, CA (US)
Assigned to ATOMBEAM TECHNOLOGIES INC., Moraga, CA (US)
Filed by AtomBeam Technologies Inc., Moraga, CA (US)
Filed on Dec. 16, 2022, as Appl. No. 18/083,437.
Application 18/083,437 is a continuation in part of application No. 17/953,946, filed on Sep. 27, 2022.
Application 17/953,946 is a continuation of application No. 17/727,913, filed on Apr. 25, 2022, granted, now 11,620,051.
Application 17/727,913 is a continuation of application No. 17/404,699, filed on Aug. 17, 2021, granted, now 11,385,794, issued on Jul. 12, 2022.
Application 17/404,699 is a continuation in part of application No. 16/455,655, filed on Jun. 27, 2019, granted, now 10,509,771, issued on Dec. 17, 2019.
Application 16/455,655 is a continuation in part of application No. 16/200,466, filed on Nov. 26, 2018, granted, now 10,476,519, issued on Nov. 12, 2019.
Application 16/200,466 is a continuation in part of application No. 15/975,741, filed on May 9, 2018, granted, now 10,303,391, issued on May 28, 2019.
Claims priority of provisional application 63/248,665, filed on Sep. 27, 2021.
Claims priority of provisional application 62/578,824, filed on Oct. 30, 2017.
Prior Publication US 2023/0106736 A1, Apr. 6, 2023
Int. Cl. G06F 3/06 (2006.01); H03M 7/30 (2006.01)

CPC G06F 3/0608 (2013.01) [G06F 3/067 (2013.01); G06F 3/0623 (2013.01); G06F 3/0659 (2013.01); H03M 7/6005 (2013.01); H03M 7/6011 (2013.01)]

10 Claims

1. A system for low-distortion compaction of floating-point numbers, comprising:

a computing device comprising a processor, a memory, and a non-volatile data storage device;

a pre-encoder comprising a first plurality of programming instructions stored in the memory and operable on the processor, wherein the first plurality of programming instructions, when operating on the processor, causes the processor to:

receive a data set for encoding, the data set comprising one or more floating-point numbers;

scan the data set to identify the one or more floating-point numbers;

for each identified floating-point number in the data set:

pre-encode the floating-point number into a binary string representation;

replace the floating-point number with its binary string representation in the data set to create a pre-encoded data set;

create an index and logically link the binary string representation with the index, wherein the index indicates the binary string represents a floating-point number in the pre-encoded data set; and

send the pre-encoded data set to a data deconstruction engine; and

the data deconstruction engine comprising a second plurality of programming instructions stored in the memory and operable on the processor, wherein the second plurality of programming instructions, when operating on the processor, causes the processor to:

receive a pre-encoded data set;

deconstruct the pre-encoded data set into a plurality of sourceblocks; and

compact each of the plurality of sourceblocks by assigning a codeword to a reference code associated with each of the plurality of sourceblocks.