US 11,868,262 B2
Methods and systems for distributing memory requests
Richard E. Kessler, San Jose, CA (US); David Asher, San Jose, CA (US); Shubhendu S Mukherjee, San Jose, CA (US); Wilson P. Snyder, II, San Jose, CA (US); David Carlson, San Jose, CA (US); Jason Zebchuk, San Jose, CA (US); and Isam Akkawi, San Jose, CA (US)
Assigned to Marvell Asia Pte, Ltd., Singapore (SG)
Filed by Marvell Asia Pte, Ltd., Singapore (SG)
Filed on Feb. 9, 2023, as Appl. No. 18/107,962.
Application 18/107,962 is a continuation of application No. 17/530,330, filed on Nov. 18, 2021, granted, now 11,615,027.
Application 17/530,330 is a continuation of application No. 16/788,172, filed on Feb. 11, 2020, granted, now 11,188,466, issued on Nov. 30, 2021.
Application 16/788,172 is a continuation of application No. 16/128,369, filed on Sep. 11, 2018, granted, now 10,558,573, issued on Feb. 11, 2020.
Prior Publication US 2023/0185720 A1, Jun. 15, 2023
Int. Cl. G06F 12/0844 (2016.01); G06F 12/0813 (2016.01)
CPC G06F 12/0844 (2013.01) [G06F 12/0813 (2013.01); G06F 2212/1016 (2013.01); G06F 2212/608 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method, comprising:
receiving a plurality of memory requests comprising a plurality of addresses, wherein each memory request of the plurality of memory requests comprises a respective address of the plurality of addresses; and
hashing the addresses of the memory requests using a plurality of hashes to distribute the memory requests among a plurality of memory components of a computer system, wherein the plurality of memory components comprises a plurality of caches, a plurality of memory controllers coupled to the plurality of caches, and a plurality of memories coupled to the plurality of memory controllers, and wherein each memory of the plurality of memories comprises a plurality of bank groups;
wherein each hash of the plurality of hashes is respectively programmed to achieve a specific distribution of the plurality of memory requests among the plurality of memory components.