US 11,868,175 B2
Heterogeneous computing systems and methods for clock synchronization
Jay Sterling Coggin, Brooklyn, NY (US); Marc Carino, Venice, CA (US); Fabian Renn-Giles, West Drayton (GB); Mark Rakes, Venice, CA (US); and Afrooz Family, Los Angeles, CA (US)
Assigned to SYNG, Inc., Venice, CA (US)
Filed by SYNG, Inc., Venice, CA (US)
Filed on Dec. 3, 2021, as Appl. No. 17/457,637.
Claims priority of provisional application 63/121,147, filed on Dec. 3, 2020.
Prior Publication US 2022/0179446 A1, Jun. 9, 2022
Int. Cl. G06F 1/12 (2006.01)
CPC G06F 1/12 (2013.01) 20 Claims
OG exemplary drawing
 
1. A heterogeneous clock synchronization system comprising:
a reference device comprising:
a clock circuitry; and
a transmitter;
where the transmitter is configured to transmit a synchronization signal based on a clock signal generated by the clock circuitry; and
at least one receiving device comprising:
a processor, configured to operate by a general-purpose operating system (GPOS);
a coprocessor, configured to operate by a real-time operating system (RTOS);
a memory utilized by the processor, where the coprocessor has direct memory access to the memory; and
a receiver, configured to receive the synchronization signal;
where the RTOS directs the coprocessor to:
trigger an interrupt upon reception of the synchronization signal;
sample a GPOS clock time stored in the memory in response to the interrupt;
generate a synchronized clock time based on the synchronization signal and the sampled GPOS clock time; and
provide the GPOS with the synchronized clock time.