CPC G06F 1/12 (2013.01) | 20 Claims |
1. A heterogeneous clock synchronization system comprising:
a reference device comprising:
a clock circuitry; and
a transmitter;
where the transmitter is configured to transmit a synchronization signal based on a clock signal generated by the clock circuitry; and
at least one receiving device comprising:
a processor, configured to operate by a general-purpose operating system (GPOS);
a coprocessor, configured to operate by a real-time operating system (RTOS);
a memory utilized by the processor, where the coprocessor has direct memory access to the memory; and
a receiver, configured to receive the synchronization signal;
where the RTOS directs the coprocessor to:
trigger an interrupt upon reception of the synchronization signal;
sample a GPOS clock time stored in the memory in response to the interrupt;
generate a synchronized clock time based on the synchronization signal and the sampled GPOS clock time; and
provide the GPOS with the synchronized clock time.
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