US 11,868,173 B2
Wireline transceiver with internal and external clock generation
Li Cai, Singapore (SG); Sau Siong Chong, Singapore (SG); Chang-Feng Loi, Singapore (SG); and Lawrence Tse, Fremont, CA (US)
Assigned to Marvell Asia Pte Ltd, Singapore (SG)
Filed by Marvell Asia Pte Ltd, Singapore (SG)
Filed on Dec. 13, 2021, as Appl. No. 17/643,996.
Claims priority of provisional application 63/242,009, filed on Sep. 8, 2021.
Claims priority of provisional application 63/235,124, filed on Aug. 19, 2021.
Prior Publication US 2023/0055985 A1, Feb. 23, 2023
Int. Cl. G06F 1/08 (2006.01); G06F 1/12 (2006.01); G06F 1/10 (2006.01)
CPC G06F 1/08 (2013.01) [G06F 1/10 (2013.01); G06F 1/12 (2013.01)] 23 Claims
OG exemplary drawing
 
1. An integrated circuit device (IC) having functional circuitry driven by a clock signal, the IC comprising onboard clock generation circuitry, the onboard clock generation circuitry comprising:
an input configured to accept a frequency reference signal;
at least one variable loading capacitor coupled to the input for converting the frequency reference signal into a calibrated clock signal;
calibration circuitry configured to calibrate the at least one variable loading capacitor based on a reference voltage, the calibration circuitry including:
a source of constant reference voltage,
a source of constant current, and
a pair of complementary switches coupled to the constant current source and to a variable reference capacitor, the complementary switches configured to be clocked according to the frequency reference signal to act as a resistor to convert the constant current to a derived voltage that charges a selected variable capacitor; and
trimming circuitry configured to convert the derived voltage into the calibrated clock signal.