US 11,865,666 B2
CMP polishing head design for improving removal rate uniformity
Te-Chien Hou, Kaohsiung (TW); Ching-Hong Jiang, Hsinchu (TW); Kuo-Yin Lin, Jhubei (TW); Ming-Shiuan She, Taoyuan (TW); Shen-Nan Lee, Jhudong Township (TW); Teng-Chun Tsai, Hsinchu (TW); and Yung-Cheng Lu, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsin-Chu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Dec. 19, 2022, as Appl. No. 18/067,960.
Application 18/067,960 is a continuation of application No. 16/225,792, filed on Dec. 19, 2018, granted, now 11,529,712.
Application 16/225,792 is a continuation of application No. 14/942,582, filed on Nov. 16, 2015, granted, now 10,160,091, issued on Dec. 25, 2018.
Prior Publication US 2023/0125195 A1, Apr. 27, 2023
Int. Cl. B24B 37/32 (2012.01); B24B 37/20 (2012.01); B24B 37/04 (2012.01)
CPC B24B 37/20 (2013.01) [B24B 37/042 (2013.01); B24B 37/32 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of forming a semiconductor wafer, the method comprising:
placing a wafer in a polishing head, the polishing head comprising:
a flexible membrane comprising a plurality of zones, each of the zones including a chamber sealed by a material of the flexible membrane;
a plurality of air passages, each of the chambers being connected to one or more of the air passages; and
a retaining ring comprising:
a first ring having a first hardness;
a second ring within the first ring having a second hardness, wherein the second hardness is less than the first hardness by a difference greater than about 10 on Shore D scale, the second ring encircling the wafer in a plan view; and
a third ring surrounding the first ring having a third hardness, wherein the third hardness is greater than the second hardness by a difference greater than about 30 on Shore D scale, and wherein the first ring, the second ring, and the third ring are joined together to form the retaining ring; and
polishing the wafer by bringing the wafer into contact with a polishing pad.