US 11,864,383 B2
Vertical-type memory device
Eun Yeoung Choi, Hwaseong-si (KR); Hyung Joon Kim, Yongin-si (KR); Su Hyeong Lee, Suwon-si (KR); and Jung Geun Jee, Seoul (KR)
Assigned to Samsung Electronics Co., Ltd.
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Oct. 6, 2021, as Appl. No. 17/495,614.
Application 17/495,614 is a continuation of application No. 16/359,009, filed on Mar. 20, 2019, granted, now 11,164,884.
Claims priority of application No. 10-2018-0136009 (KR), filed on Nov. 7, 2018.
Prior Publication US 2022/0028889 A1, Jan. 27, 2022
Int. Cl. H10B 41/30 (2023.01); H10B 43/27 (2023.01); H01L 29/10 (2006.01); H01L 29/16 (2006.01); H01L 21/768 (2006.01); H01L 21/02 (2006.01); H01L 21/28 (2006.01)
CPC H10B 43/27 (2023.02) [H01L 21/0228 (2013.01); H01L 21/76802 (2013.01); H01L 21/76832 (2013.01); H01L 29/1033 (2013.01); H01L 29/16 (2013.01); H01L 29/40117 (2019.08)] 20 Claims
OG exemplary drawing
 
1. A vertical-type memory device, comprising:
a peripheral circuit region comprising a lower substrate and circuit devices on the lower substrate; and
a cell region on the peripheral circuit region,
wherein the cell region comprises:
a plurality of gate electrodes stacked on a substrate; and
a vertical channel structure that penetrates the plurality of gate electrodes in a first direction, perpendicular to an upper surface of the substrate,
wherein the vertical channel structure comprises:
a channel layer extending in the first direction;
a first liner overlapping at least a portion of an upper internal side wall of the channel layer, wherein the first liner comprises n-type impurities; and
a pad on the first liner and in contact with the first liner,
wherein a bottom surface of the first liner is convexly rounded toward the upper surface of the substrate,
wherein the bottom surface of the first liner is lower than a lower surface of an uppermost first gate electrode among the plurality of gate electrodes and is higher than an upper surface of a second gate electrode directly below the first gate electrode, and
wherein a bottom surface of the pad is convexly rounded toward the upper surface of the substrate.