CPC H05B 47/19 (2020.01) [F21V 23/006 (2013.01); H01L 23/552 (2013.01); H01L 23/66 (2013.01); H03F 1/223 (2013.01); H03F 1/32 (2013.01); H03F 1/3205 (2013.01); H03F 1/347 (2013.01); H03F 1/565 (2013.01); H03F 3/195 (2013.01); H03F 3/245 (2013.01); H04B 1/0475 (2013.01); H04B 1/40 (2013.01); H01L 2223/665 (2013.01); H01L 2223/6655 (2013.01); H01L 2223/6677 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48195 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/49171 (2013.01); H01L 2224/73265 (2013.01); H01L 2924/19104 (2013.01); H01Q 1/2283 (2013.01); H01Q 1/38 (2013.01); H01Q 9/42 (2013.01); H03F 2200/222 (2013.01); H03F 2200/294 (2013.01); H03F 2200/451 (2013.01); H03F 2200/534 (2013.01); H04B 2001/0433 (2013.01); H04W 84/12 (2013.01)] | 20 Claims |
1. A packaged module comprising:
a package substrate;
a radio frequency shielding structure extending above the package substrate;
a front end integrated circuit positioned in an interior of the radio frequency shielding structure, the front end integrated circuit including a multi-mode power amplifier circuit that includes an input stage and a stacked output stage that is coupled to the input stage by way of an inter-stage matching network, the stacked output stage including a transistor stack of two or more transistors arranged in series with each other, and a bias circuit configured to bias the transistor stack such that the stacked output stage functions like there is at least one less transistor in the transistor stack in a second mode relative to a first mode; and
an antenna on the package substrate external to the radio frequency shielding structure.
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