US 11,864,136 B2
Synchronization signal block and control resource set multiplexing in wireless communications
Iyab Issam Sakhnini, San Diego, CA (US); and Tao Luo, San Diego, CA (US)
Assigned to QUALCOMM Incorporated, San Diego, CA (US)
Filed by QUALCOMM Incorporated, San Diego, CA (US)
Filed on Jan. 30, 2023, as Appl. No. 18/161,273.
Application 18/161,273 is a continuation of application No. 17/175,444, filed on Feb. 12, 2021, granted, now 11,606,763.
Prior Publication US 2023/0180155 A1, Jun. 8, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H04W 56/00 (2009.01); H04L 27/26 (2006.01); H04W 72/0453 (2023.01); H04W 72/044 (2023.01); H04W 72/53 (2023.01)
CPC H04W 56/001 (2013.01) [H04L 27/2607 (2013.01); H04L 27/2636 (2013.01); H04W 72/046 (2013.01); H04W 72/0453 (2013.01); H04W 72/53 (2023.01)] 30 Claims
OG exemplary drawing
 
1. An apparatus for wireless communication at a user equipment (UE), comprising:
a processor;
memory coupled with the processor; and
instructions stored in the memory and executable by the processor to cause the apparatus to:
monitor a first beam for a first multiplexed block that includes a first synchronization signal block that is multiplexed in a frequency domain with a first control resource set;
estimate a channel associated with the first synchronization signal block and the first control resource set based at least in part on at least a first reference signal contained in a set of reference signal resources that span the first synchronization signal block and the first control resource set; and
decode at least a portion of one or more of the first synchronization signal block or the first control resource set based at least in part on the estimate of the channel.