US 11,863,356 B2
Analog receiver front-end with variable gain amplifier embedded in an equalizer structure
Miao Li, San Diego, CA (US); Zhiqin Chen, San Diego, CA (US); Yu Song, San Diego, CA (US); Hongmei Liao, San Diego, CA (US); Zhi Zhu, San Diego, CA (US); Hao Liu, San Diego, CA (US); and Lejie Lu, San Diego, CA (US)
Assigned to QUALCOMM INCORPORATED, San Diego, CA (US)
Filed by QUALCOMM Incorporated, San Diego, CA (US)
Filed on Jan. 31, 2022, as Appl. No. 17/589,782.
Prior Publication US 2023/0246885 A1, Aug. 3, 2023
Int. Cl. H04L 25/03 (2006.01)
CPC H04L 25/03057 (2013.01) [H04L 25/03885 (2013.01)] 27 Claims
OG exemplary drawing
 
1. A receiving circuit, comprising:
a first equalizer circuit including:
a first source degeneration circuit that comprises a first source degeneration resistor coupled in parallel with a first source degeneration capacitor; and
a first trans-impedance amplifier (TIA) comprising a first variable feedback resistor that is coupled between a first input of the first TIA and a first output of the first TIA and a second variable feedback resistor that is coupled between a second input of the first TIA and a second output of the first TIA,
wherein the first variable feedback resistor and the second variable feedback resistor are configured to control a first gain that is provided by the first equalizer circuit, and
wherein resistance values of the first variable feedback resistor and the second variable feedback resistor are controlled by a first control input received at the first equalizer circuit.