US 11,862,727 B2
Method for fabricating fin structure for fin field effect transistor
Hao Che Feng, Kaohsiung (TW); Hung Jen Huang, Tainan (TW); Hsin Min Han, Kaohsiung (TW); Shih-Wei Su, Tainan (TW); Ming Shu Chiu, Tainan (TW); Pi-Hung Chuang, Changhua County (TW); Wei-Hao Huang, New Taipei (TW); Shao-Wei Wang, Taichung (TW); and Ping Wei Huang, Pingtung County (TW)
Assigned to United Microelectronics Corp., Hsinchu (TW)
Filed by United Microelectronics Corp., Hsinchu (TW)
Filed on Dec. 29, 2022, as Appl. No. 18/090,510.
Application 18/090,510 is a division of application No. 16/992,061, filed on Aug. 12, 2020, granted, now 11,581,438.
Prior Publication US 2023/0135072 A1, May 4, 2023
Int. Cl. H01L 29/78 (2006.01); H01L 29/06 (2006.01); H01L 21/02 (2006.01); H01L 29/66 (2006.01); H01L 21/3105 (2006.01); H01L 21/311 (2006.01)
CPC H01L 29/7854 (2013.01) [H01L 21/0217 (2013.01); H01L 21/02247 (2013.01); H01L 21/31053 (2013.01); H01L 21/31111 (2013.01); H01L 21/31144 (2013.01); H01L 29/0649 (2013.01); H01L 29/66818 (2013.01)] 8 Claims
OG exemplary drawing
 
1. A method for fabricating a fin structure for fin field effect transistor, comprising:
providing a substrate, including a fin structure having a silicon fin and a single mask layer just on a top of the silicon fin, the single mask layer being as a top portion of the fin structure;
forming a stress buffer layer on the substrate and conformally covering over the fin structure;
forming an atomic layer deposition (ALD) layer between the stress buffer layer and each of the silicon fins;
performing a nitridation treatment on the stress buffer layer to have a nitride portion;
perform a flowable deposition process to form a flowable dielectric layer to cover over the fin structures;
annealing the flowable dielectric layer; and
polishing the flowable dielectric layer, wherein the nitride portion of the stress buffer layer is used as a polishing stop.