US 11,862,682 B2
Semiconductor device
Jihye Yi, Suwon-si (KR); Moonseung Yang, Suwon-si (KR); and Jungtaek Kim, Suwon-si (KR)
Assigned to Samsung Electronics Co., Ltd., Gyeonggi-do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Oct. 27, 2021, as Appl. No. 17/511,778.
Application 17/511,778 is a division of application No. 16/750,273, filed on Jan. 23, 2020, granted, now 11,183,562, issued on Nov. 23, 2021.
Claims priority of application No. 10-2019-0068892 (KR), filed on Jun. 11, 2019.
Prior Publication US 2022/0052161 A1, Feb. 17, 2022
Int. Cl. H01L 29/10 (2006.01); H01L 29/417 (2006.01); H01L 29/423 (2006.01); H01L 29/165 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 29/06 (2006.01); H01L 21/02 (2006.01); H01L 21/306 (2006.01); H01L 21/308 (2006.01); H01L 21/311 (2006.01); H01L 21/265 (2006.01)
CPC H01L 29/1037 (2013.01) [H01L 29/0673 (2013.01); H01L 29/165 (2013.01); H01L 29/41775 (2013.01); H01L 29/42392 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01); H01L 21/02532 (2013.01); H01L 21/02636 (2013.01); H01L 21/26513 (2013.01); H01L 21/308 (2013.01); H01L 21/30604 (2013.01); H01L 21/31116 (2013.01); H01L 29/6653 (2013.01); H01L 29/6656 (2013.01); H01L 29/66545 (2013.01); H01L 29/66553 (2013.01); H01L 29/7848 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a substrate, the substrate including an active region extending in a first direction;
a plurality of channel layers on the active region, the plurality of channel layers disposed in a direction perpendicular to an upper surface of the substrate;
a gate electrode respectively surrounding the plurality of channel layers, the gate electrode extending in a second direction crossing the first direction, the gate electrode including a first portion and a second portion on an uppermost channel layer of the plurality of channel layers, the first portion of the gate electrode being on the second portion of the gate electrode, the gate electrode further including a silicon cap layer between the first portion and the second portion of the gate electrode; and
a source/drain structure disposed on both sides of the gate electrode, respectively, and connected to each of the plurality of channel layers,
wherein the second portion of the gate electrode overlaps the source/drain structure in the first direction to provide an overlapped portion of the gate electrode.