US 11,862,640 B2
Cross field effect transistor (XFET) library architecture power routing
Richard T. Schultz, Ft. Collins, CO (US)
Assigned to Advanced Micro Devices, Inc., Santa Clara, CA (US)
Filed by Advanced Micro Devices, Inc., Santa Clara, CA (US)
Filed on Sep. 29, 2021, as Appl. No. 17/489,276.
Prior Publication US 2023/0096652 A1, Mar. 30, 2023
Int. Cl. H01L 27/12 (2006.01); H01L 23/48 (2006.01); H01L 21/84 (2006.01); H01L 23/528 (2006.01)
CPC H01L 27/1203 (2013.01) [H01L 21/84 (2013.01); H01L 23/481 (2013.01); H01L 23/5286 (2013.01)] 7 Claims
OG exemplary drawing
 
1. An integrated circuit comprising:
a first transistor comprising a first channel oriented in a first direction;
an oxide layer vertically adjacent to the first transistor;
a first local interconnect layer vertically adjacent to the oxide layer; and
a first via physically connecting the first local interconnect layer to a source region of the first transistor; and
wherein responsive to a potential being applied to an input node of a cell of the integrated circuit, a current is conveyed from the input node to an output node of the cell through the first transistor.