US 11,862,627 B2
Display device
Dongwook Kim, Yongin-si (KR); and Wonkyu Kwak, Yongin-si (KR)
Assigned to SAMSUNG DISPLAY CO., LTD., Yongin-si (KR)
Filed by Samsung Display Co., Ltd., Yongin-si (KR)
Filed on Oct. 14, 2022, as Appl. No. 17/966,395.
Application 17/208,603 is a division of application No. 16/263,344, filed on Jan. 31, 2019, granted, now 10,978,447, issued on Apr. 13, 2021.
Application 17/966,395 is a continuation of application No. 17/208,603, filed on Mar. 22, 2021, granted, now 11,476,246.
Claims priority of application No. 10-2018-0012025 (KR), filed on Jan. 31, 2018.
Prior Publication US 2023/0044081 A1, Feb. 9, 2023
Int. Cl. G06F 3/041 (2006.01); H10K 50/824 (2023.01); H10K 59/40 (2023.01); H10K 59/122 (2023.01); H10K 59/126 (2023.01); G02F 1/1362 (2006.01); H10K 50/84 (2023.01); H10K 59/88 (2023.01); H01L 27/02 (2006.01); G09G 3/3266 (2016.01); G09G 3/3275 (2016.01); H10K 50/842 (2023.01); H10K 59/131 (2023.01); G06F 3/044 (2006.01); G02F 1/1345 (2006.01); H10K 50/822 (2023.01); H10K 59/124 (2023.01)
CPC H01L 27/0292 (2013.01) [G06F 3/0412 (2013.01); G06F 3/04164 (2019.05); G09G 3/3266 (2013.01); G09G 3/3275 (2013.01); H10K 50/824 (2023.02); H10K 50/8426 (2023.02); H10K 59/122 (2023.02); H10K 59/126 (2023.02); H10K 59/131 (2023.02); H10K 59/40 (2023.02); G02F 1/13452 (2013.01); G02F 1/136204 (2013.01); G06F 3/044 (2013.01); G06F 3/0446 (2019.05); G06F 2203/04107 (2013.01); G09G 2310/0278 (2013.01); G09G 2310/0297 (2013.01); H10K 50/822 (2023.02); H10K 50/84 (2023.02); H10K 59/124 (2023.02); H10K 59/88 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A display device, comprising:
a substrate including a display area and a peripheral area outside the display area;
a display element in the display area, the display element including a pixel electrode electrically connected to a thin film transistor, an opposite electrode of the pixel electrode, and an emission layer between the pixel electrode and the opposite electrode;
a peripheral circuit in the peripheral area;
a first shielding layer and a second shielding layer each located in the peripheral area;
an input sensor including sensing electrodes and signal lines, wherein
the sensing electrodes are located in the display area, and
the signal lines are connected to the sensing electrodes and located in the peripheral area; and
an encapsulation layer, wherein
in the peripheral area, the encapsulation layer is disposed between the first shielding layer and the signal lines, and the second shielding layer is disposed between the first shielding layer and the encapsulation layer, and
the first shielding layer has a plurality of first holes, the second shielding layer has a plurality of second holes, and the plurality of first holes and the plurality of second holes are arranged to be offset from each other in a plan view.