| CPC H01L 25/0657 (2013.01) [H01L 25/0652 (2013.01); H01L 25/0655 (2013.01); H01L 25/18 (2013.01); H01L 24/32 (2013.01); H01L 24/49 (2013.01); H01L 24/73 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/49176 (2013.01); H01L 2224/73215 (2013.01); H01L 2224/73265 (2013.01); H01L 2225/0651 (2013.01); H01L 2225/06506 (2013.01); H01L 2225/06562 (2013.01); H01L 2225/06586 (2013.01)] | 20 Claims |
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1. A semiconductor package comprising:
a package substrate including a first insulating layer, a wiring layer disposed on the first insulating layer, and a second insulating layer disposed on the first insulating layer and covering at least a portion of the wiring layer;
first and second support members disposed to face each other on the second insulating layer of the package substrate and spaced apart from each other in a first direction;
first and second semiconductor chips disposed between the first and second support members and spaced apart from each other in a second direction, which intersects the first direction;
a stack structure disposed on the first and second support members and the first and second semiconductor chips and including at least one third semiconductor chip; and
an encapsulant disposed on the package substrate and filling a space between the first and second support members and a space between the first and second semiconductor chips,
wherein the second insulating layer has an opening exposing at least a portion of the first insulating layer positioned between the first and second semiconductor chips, and the opening is filled with the encapsulant.
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