US 11,862,581 B2
Semiconductor package including conductive crack preventing layer
Ji Eun Park, Suwon-si (KR); and Mi Jin Park, Suwon-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Aug. 12, 2022, as Appl. No. 17/886,763.
Application 17/886,763 is a continuation of application No. 16/985,918, filed on Aug. 5, 2020, granted, now 11,417,612.
Application 16/985,918 is a continuation of application No. 16/293,301, filed on Mar. 5, 2019, granted, now 10,756,030, issued on Aug. 25, 2020.
Claims priority of application No. 10-2018-0093929 (KR), filed on Aug. 10, 2018.
Prior Publication US 2022/0392853 A1, Dec. 8, 2022
Int. Cl. H01L 21/82 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/04 (2006.01); H01L 23/498 (2006.01)
CPC H01L 23/562 (2013.01) [H01L 23/041 (2013.01); H01L 23/3128 (2013.01); H01L 23/49822 (2013.01); H01L 24/08 (2013.01); H01L 2224/08235 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of manufacturing a semiconductor package, the method comprising:
preparing a semiconductor chip having an active surface on which contact pads are arranged, the semiconductor chip comprising a first insulating film disposed on the active surface and exposing the contact pads, and a second insulating film disposed on the first insulating film and comprising a first opening exposing connection regions of the contact pads,
forming a conductive crack preventing layer on the connection regions to extend onto a portion of the second insulating film around the first opening;
forming an insulating layer on the active surface of the semiconductor chip;
forming a second opening in the insulating layer, the second opening exposing a portion of the conductive crack preventing layer on the connection regions; and
forming a redistribution layer electrically connected to the connection regions through the second opening and extending onto the insulating layer.