US 11,862,478 B2
Mask design for improved attach position
ChangOh Kim, Incheon (KR); KyoungHee Park, Seoul (KR); JinHee Jung, Incheon (KR); OMin Kwon, Gyeonggi-do (KR); JiWon Lee, Seoul (KR); and YuJeong Jang, Incheon (KR)
Assigned to STATS ChipPAC Pte. Ltd.
Filed by STATS ChipPAC Pte. Ltd., Singapore (SG)
Filed on Jun. 14, 2022, as Appl. No. 17/806,924.
Application 17/806,924 is a division of application No. 17/127,079, filed on Dec. 18, 2020, granted, now 11,393,698.
Prior Publication US 2022/0310408 A1, Sep. 29, 2022
Int. Cl. H01L 21/683 (2006.01); H01L 21/48 (2006.01); H01L 23/31 (2006.01); H01L 23/498 (2006.01); H01L 23/552 (2006.01); H01L 23/544 (2006.01)
CPC H01L 21/4814 (2013.01) [H01L 21/6835 (2013.01); H01L 23/3121 (2013.01); H01L 23/49822 (2013.01); H01L 23/49838 (2013.01); H01L 23/544 (2013.01); H01L 23/552 (2013.01); H01L 2221/6835 (2013.01); H01L 2221/68322 (2013.01); H01L 2223/54413 (2013.01)] 25 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a semiconductor package including,
a substrate comprising a land grid array,
a component disposed over the substrate, and
an encapsulant deposited over the component, wherein the land grid array remains outside the encapsulant;
a carrier, wherein the semiconductor package is disposed on the carrier;
a metal mask including a fiducial marker disposed on the carrier and extending over the land grid array; and
a shielding layer formed over the semiconductor package and metal mask.