CPC G11C 29/44 (2013.01) [G11C 29/12005 (2013.01); G11C 29/12015 (2013.01); G11C 29/42 (2013.01)] | 20 Claims |
1. A system comprising:
a memory device; and
a processing device, operatively coupled to the memory device, the processing device to perform operations comprising:
associating a first block family with a first bin of a plurality of bins, each of the plurality of bins associated with one or more read voltage offsets, wherein the read voltage offsets are to compensate for a temporal read voltage shift caused by a charge loss by memory cells of the first block family; and
responsive to an occurrence of a power event, performing diagnostics of one or more blocks of the first block family; and
based on results of the diagnostics, associating the first block family with a second bin of the plurality of bins.
|