CPC G09G 3/32 (2013.01) [G09G 2300/08 (2013.01); G09G 2310/0289 (2013.01); G09G 2310/08 (2013.01); G09G 2330/021 (2013.01)] | 6 Claims |
1. A display device comprising:
a pixel unit including a plurality of pixels, each including a luminous element and a pixel circuit connected to the luminous element;
a clock generator configured to generate a plurality of clock signals each corresponding to each of a plurality of subframes constituting a frame; and
a parallel to serial converter configured to convert the plurality of clock signals to a serial clock signal and transfer the serial clock signal to the pixel unit; and
wherein the pixel circuit of each pixel includes:
a first pixel circuit configured to control light-emission and non-emission of the luminous element in response to a control signal applied to each of the plurality of subframes; and
a second pixel circuit configured to store bit values of image data in the frame and generate the control signal based on the stored bit values and the serial clock signal such that each subframe included in the frame is controlled according to each bit value.
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