US 11,861,209 B2
Memory system and method of operating the same
Hyo Byung Han, Icheon (KR); Jin Woo Kim, Icheon (KR); Jin Won Jang, Icheon (KR); and Young Wu Choi, Icheon (KR)
Assigned to SK hynix Inc., Icheon (KR)
Filed by SK hynix Inc., Icheon (KR)
Filed on Oct. 1, 2021, as Appl. No. 17/492,358.
Claims priority of application No. 10-2021-0046786 (KR), filed on Apr. 9, 2021.
Prior Publication US 2022/0326873 A1, Oct. 13, 2022
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0655 (2013.01) [G06F 3/0619 (2013.01); G06F 3/0679 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A memory system comprising:
a memory device including a page storing a first chunk including first user data and first meta data and a second chunk including second user data and second meta data;
a system memory storing an address map table for a physical address of the page in which the first chunk and the second chunk are stored and a logical address mapped to the physical address; and
a controller configured to perform a read operation of the page wherein an error correction operation of the first chunk has failed by:
identifying whether the first meta data of the first chunk includes the logical address mapped to a physical address of the first chunk;
recovering the first meta data using the physical address of the first chunk and the address map table in response to identifying that the logical address was included in the first meta data stored in the first chunk, and
outputting the second user data using the second meta data of the second chunk and using the recovered first meta data, wherein an error correction operation of the second chunk has passed.