US 11,861,189 B2
Calibration apparatus and method for data communication in a memory system
Duk Joon Jeon, Gyeonggi-do (KR)
Assigned to SK hynix Inc., Gyeonggi-do (KR)
Filed by SK hynix Inc., Gyeonggi-do (KR)
Filed on Mar. 12, 2021, as Appl. No. 17/200,007.
Claims priority of application No. 10-2020-0131605 (KR), filed on Oct. 13, 2020.
Prior Publication US 2022/0113885 A1, Apr. 14, 2022
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0631 (2013.01) [G06F 3/0602 (2013.01); G06F 3/0679 (2013.01)] 18 Claims
OG exemplary drawing
 
17. A memory system, comprising:
a memory device including a plurality of memory blocks, each memory block including memory cells capable of storing multi-bit data; and
a controller configured to:
allocate the plurality of memory blocks for plural zoned namespaces input from an external device,
access a memory block allocated for one of the plural zoned namespaces in response to a data input/output request input from the external device,
adjust, in response to a first request, a number of bits of data stored in a memory cell included in a memory block, which is allocated for at least one zoned namespace among the plural zoned namespaces, and
deactivate at least one zoned namespace other than the at least one zoned namespace among the plural zoned namespaces to maintain the storage capacity of the at least one zoned namespace corresponding to the first request.