US 11,861,181 B1
Triple modular redundancy (TMR) radiation hardened memory system
David D. Moser, Haymarket, VA (US); Richard J. Ferguson, Bealeton, VA (US); and Daniel L. Stanley, Warrenton, VA (US)
Assigned to BAE Systems Information and Electronic Systems Integration Inc., Nashua, NH (US)
Filed by BAE SYSTEMS Information and Electronic Systems Integration Inc., Nashua, NH (US)
Filed on Aug. 10, 2022, as Appl. No. 17/818,850.
Int. Cl. G06F 11/07 (2006.01); G06F 3/06 (2006.01); G06F 11/14 (2006.01)
CPC G06F 3/0619 (2013.01) [G06F 3/0652 (2013.01); G06F 3/0653 (2013.01); G06F 3/0673 (2013.01); G06F 11/0772 (2013.01); G06F 11/141 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A memory system comprising:
a redundancy comparator configured to detect differences between data stored redundantly in a first memory, a second memory, and a third memory, the redundancy comparator further configured to identify a memory error based on the detected differences;
an error collection buffer configured to store a memory address associated with the memory error;
a memory scrubber circuit configured to overwrite, at the memory address associated with the memory error, erroneous data with corrected data, the corrected data generated based on a majority vote performed among the first memory, the second memory, and the third memory; and
a priority arbitrator configured to arbitrate between the overwriting performed by the memory scrubber and a functional memory access associated with software execution performed by a processor configured to utilize the memory system.