US 11,860,730 B2
Low-overhead, bidirectional error checking for a serial peripheral interface
Kaushik Kannan, Mountain View, CA (US); and David Sobel, Los Altos, CA (US)
Assigned to Waymo LLC, Mountain View, CA (US)
Filed by Waymo LLC, Mountain View, CA (US)
Filed on Dec. 6, 2021, as Appl. No. 17/542,906.
Prior Publication US 2023/0176944 A1, Jun. 8, 2023
Int. Cl. G06F 11/10 (2006.01); G06F 13/42 (2006.01); G06F 11/30 (2006.01); G06F 11/07 (2006.01)
CPC G06F 11/1004 (2013.01) [G06F 11/0772 (2013.01); G06F 11/3031 (2013.01); G06F 13/4291 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A device comprising:
an integrated circuit; and
a serial peripheral interface (SPI) communicatively coupled to the integrated circuit,
wherein the SPI comprises a Master In Slave Out (MISO) channel and a Master Out Slave In (MOSI) channel,
wherein the MOSI channel is configured to:
receive a write address within the integrated circuit to be written to;
receive payload data to be written; and
receive a forward error-checking code usable to identify data corruption within the write address or the payload data, and
wherein the integrated circuit is configured to:
calculate a reverse error-checking code based on the received write address and payload data, wherein the reverse error-checking code is usable to identify data corruption within the write address or the payload data;
provide, to the MISO channel, the calculated reverse error-checking code;
compare the forward error-checking code to the reverse error-checking code; and
write, to the write address when the forward error-checking code matches the reverse error-checking code, the payload data.