US 11,860,656 B2
Low-dropout voltage regulator
You-Fa Wang, Singapore (SG); Wei Shi, Singapore (SG); and Darmayuda Imade, Singapore (SG)
Assigned to LITE-ON SINGAPORE PTE. LTD., Singapore (SG)
Filed by LITE-ON SINGAPORE PTE. LTD., Singapore (SG)
Filed on Feb. 9, 2022, as Appl. No. 17/668,338.
Claims priority of application No. 202210005160.X (CN), filed on Jan. 5, 2022.
Prior Publication US 2023/0213953 A1, Jul. 6, 2023
Int. Cl. G05F 1/46 (2006.01)
CPC G05F 1/461 (2013.01) 10 Claims
OG exemplary drawing
 
1. A low-dropout voltage regulator, comprising:
a differential amplifier pair including an output terminal and a feedback terminal;
a secondary amplification circuit that is self-stabilized including an input terminal and an output terminal, wherein the output terminal of the differential amplifier pair is electrically connected to the input terminal of the secondary amplification circuit that is self-stabilized, wherein the secondary amplification circuit includes a first amplification transistor and a second amplification transistor, wherein the first amplification transistor includes a first terminal, a second terminal, and a third terminal, and the second amplification transistor includes a first terminal, a second terminal, and a third terminal, wherein the first terminal of the first amplification transistor is electrically connected to an input voltage, wherein the second terminal of the first amplification transistor is electrically connected to the second terminal of the second amplification transistor to form the input terminal of the secondary amplification circuit to be connected to the output terminal of the differential amplifier pair, wherein the third terminal of the first amplification transistor is electrically connected to the first terminal of the second amplification transistor to form the output terminal of the secondary amplification circuit that is self-stabilized;
an output circuit including an output transistor and a feedback circuit, wherein the output transistor includes a first terminal, a second terminal, and a third terminal, wherein the first terminal of the output transistor is electrically connected to the input voltage, the second terminal of the output transistor being electrically connected to the output terminal of the secondary amplification circuit, the third terminal of the output transistor being electrically connected to the feedback circuit, and the feedback circuit is electrically connected to the feedback terminal of the differential amplifier pair; and
a frequency compensation circuit disposed between the output terminal of the secondary amplification circuit, the second terminal of the output transistor, and the third terminal of the output transistor.