CPC G01R 31/31926 (2013.01) [G01R 31/31905 (2013.01); G01R 31/31907 (2013.01)] | 18 Claims |
1. An automated test equipment (ATE) system comprising:
a system controller communicatively coupled to a tester processor, wherein the system controller is operable to transmit instructions to the tester processor;
a field programmable gate array (FPGA) communicatively coupled to the tester processor, wherein the FPGA is operable to internally generate commands and data transparently from the tester processor for testing a device under test (DUT), and wherein the FPGA comprises routing logic operable to route signals associated with the commands and data in the FPGA based on a physical communication interface type of the DUT; and
connection hardware operable to physically connect to different physical communication interface types implemented for devices under test (DUTs) wherein the connection hardware comprises a connector module communicatively coupled to the FPGA, wherein the connector module comprises a socket operable to receive and to connect to the DUT and circuitry for routing the signals via the socket to a set of pins on the DUT, wherein the set of pins is associated with a first physical communication interface type of DUT, wherein the connector module further comprises circuitry for re-routing the signals via the socket to a different set of pins on the DUT, wherein the different set of pins is associated with a second physical communication interface type of DUT which is different from the first physical communication interface type of DUT.
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