US 10,170,432 B2
Semiconductor structure
Po-Chun Lin, Changhua County (TW); and Chin-Lung Chu, Taoyuan (TW)
Assigned to NANYA TECHNOLOGY CORPORATION, New Taipei (TW)
Filed by NANYA TECHNOLOGY CORPORATION, New Taipei (TW)
Filed on Apr. 20, 2017, as Appl. No. 15/493,119.
Prior Publication US 2018/0308803 A1, Oct. 25, 2018
Int. Cl. H01L 23/552 (2006.01); H01L 23/522 (2006.01); H01L 23/532 (2006.01); H01L 23/00 (2006.01); H01L 23/528 (2006.01)
CPC H01L 23/552 (2013.01) [H01L 23/5226 (2013.01); H01L 23/5283 (2013.01); H01L 23/53238 (2013.01); H01L 24/09 (2013.01); H01L 2224/02381 (2013.01)] 15 Claims
OG exemplary drawing
 
1. A semiconductor structure, comprising:
a substrate having a front side surface and a back side surface;
at least one semiconductor device disposed on the front side surface;
a through-substrate via (TSV) disposed in the substrate, wherein the TSV is exposed by the front side surface and the back side surface, and the TSV is electrically connected to the semiconductor device;
a shield structure disposed in the substrate and surrounding the TSV, wherein the shield structure is exposed by the front side surface, the shield structure is electrically isolated from the TSV, and the shield structure and the TSV having bottom ends at different heights; and
a first dielectric layer covering a side surface and a bottom surface of the shield structure, wherein the back side surface of the substrate is lower than a bottom surface of the first dielectric layer.